On July 28, 2026, the global semiconductor industry achieved a major breakthrough: international chip giants Intel and TSMC announced the launch of new-generation data center processors based on Chiplet architecture. Both products utilize advanced heterogeneous integration technology, packaging modules of different processes and functions via high-speed interconnects, delivering leaps in performance and energy efficiency. The news quickly impacted the semiconductor sector, driving stock price gains across supply chain companies and channeling capital into the Chiplet ecosystem.
Why Has Chiplet Technology Become a New Investment Focus?
The core logic of Chiplet architecture is "break down the whole into parts": a traditional monolithic SoC is divided into multiple smaller chip modules, each using the most suitable process node (e.g., advanced process for logic, mature process for I/O), then integrated via advanced packaging technologies (e.g., Intel's EMIB, TSMC's CoWoS). This approach not only reduces R&D costs and yield risks of advanced nodes but also enables faster iteration. For high-compute scenarios like data centers, Chiplet flexibly combines CPUs, GPUs, NPUs, and even memory, significantly improving compute density.
According to the latest report from Yole Développement, the global Chiplet market is expected to exceed $25 billion in 2026, surpassing $80 billion by 2030 with a CAGR of 35%. This growth far outpaces the overall semiconductor market, making it a key driver for venture capital and industrial investment.
Giants Accelerate Deployment, Ecosystem Set to Explode
Intel's Granite Rapids-AP processor uses seven Chiplet modules (4 compute, 2 I/O, 1 memory control chips) interconnected via EMIB, achieving 40% performance improvement over the previous generation. TSMC showcased its Chiplet solution on the 3D Fabric platform, integrating up to 16 chip modules, designed for hyperscale cloud providers.
Beyond IDM giants, design service companies such as MediaTek and VeriSilicon have begun offering Chiplet design services, while OSATs like ASE Technology Holding and JCET are actively expanding advanced packaging capacity. Industry advisors point out that Chiplet will reshape the semiconductor supply chain: the traditional single foundry-led production model will shift to multi-factory collaboration, benefiting IP providers, advanced packaging equipment makers, and EDA tool vendors.
How Can Investors Capture the Chiplet Wave?
- Advanced Packaging Equipment & Materials: Demand surges for TSV, micro-bumps, temporary bonding, etc. Equipment makers like Applied Materials and ASM Pacific, and material suppliers like Japan's JSR and Germany's Merck are worth watching.
- High-Speed Interconnect IP & Chip Design: Inter-chip communication standards such as UCIe have become industry foundations. Providers of UCIe IP like Synopsys and Altera hold pricing power.
- Heterogeneous Integration OSAT Services: OSATs with 2.5D/3D packaging capabilities will receive exceptional orders. Taiwan's ASE Technology Holding, China's JCET and TongFu Microelectronics have already positioned in Chiplet.
- End-Application Drivers: Data centers, HPC, and AI training chips are Chiplet's largest markets. Next-gen products from GPU giants like NVIDIA and AMD will fully adopt Chiplet architecture.
Risks & Challenges: Not All Chips Fit Chiplet
Despite promising prospects, Chiplet is not a panacea. Thermal issues, test complexity, and supply chain coordination are technical hurdles. Additionally, ecosystem barriers between companies may cause compatibility problems. Investors should note that Chiplet technology is still in early stages, and some companies have high valuations. Focus on firms with true volume production experience, deep patent moats, and strong ties with top customers.
In summary, the rise of Chiplet is redefining semiconductor investment logic: from "chasing Moore's Law" to "heterogeneous integration efficiency." As data center compute demand continues to surge, Chiplet will become one of the most certain investment themes in the semiconductor space over the next five years.
